Physical unclonable functions (PUFs), are a type of physical security primitive which enable identification and authentication of hardware devices, such as field programmable gate arrays (FPGAs) and application specific integrated circuits(ASICs). They exploit the random process variations that occur during manufacturing to create an intrinsic identifier or response unique to the physical hardware itself. Arbiter PUFs were the first proposed Strong PUF and are also widely studied. However, these designs often suffer from poor uniqueness and reliability characteristics leaving them vulnerable to modeling attacks, aswell as being difficult to implement on FPGAs due to the physical layout restrictions. Some more recent designs based around nonlinear voltage transfer characteristics, or non-linear currents improve the resistance against modeling attacks. However they can only be implemented on ASICs due to their voltage/current requirements. To address this problem, we propose a new PUFcircuit that offers a significantly higher theoretical entropy than the traditional Arbiter PUF construction, and which is specifically designed for FPGAs. The proposed work is verified on a low-cost Nexys4 board which contains a Xilinx Artix-7 FPGA fabricated at 28nm. The experimental results give a uniqueness of 20 %, considerably higher than the reported 9 % of a traditional Arbiter PUF design, and an expected reliability of ≈ 96 % over an environmental temperature range of 0 o C to 75 o C, with a reliability of ≈ 92 % with ±10 % variation in supply voltage.
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机译:物理不可克隆功能(PUF)是一种物理安全性原语,可以对硬件设备(例如现场可编程门阵列(FPGA)和专用集成电路(ASIC))进行标识和身份验证。他们利用制造过程中发生的随机过程变化来创建固有标识符或物理硬件本身唯一的响应。仲裁器PUF是最早提出的强PUF,并且也得到了广泛的研究。但是,这些设计通常具有糟糕的唯一性和可靠性特征,使其容易遭受建模攻击,并且由于物理布局限制而难以在FPGA上实现。一些基于非线性电压传递特性或非线性电流的最新设计提高了抵抗建模攻击的能力。但是,由于其电压/电流要求,它们只能在ASIC上实现。为了解决这个问题,我们提出了一种新的PUF电路,它比传统的Arbiter PUF结构具有更高的理论熵,并且是专为FPGA设计的。拟议的工作在低成本Nexys4板上进行了验证,该板上包含以28nm工艺制造的Xilinx Artix-7 FPGA。实验结果给出了20%的唯一性,大大高于传统Arbiter PUF设计的9%的报道,在0 o C至75 o C的环境温度范围内,预期的可靠性约为≈96%,可靠性为≈92%,电源电压变化±10%。
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